Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-12-12
2009-10-20
Ellis, Kevin L (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C710S057000
Reexamination Certificate
active
07606979
ABSTRACT:
Method and system for conservatively managing store capacity available to a processor issuing stores are provided and described. In particular, a counter mechanism is utilized, whereas the counter mechanism is incremented or decremented based on the occurrence of particular events.
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Dunn David
Klaiber Alexander
Rozas Guillermo
Serris Paul
Shah Lacky
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