Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1996-05-31
1999-06-29
Bragdon, Reginald G.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711113, 711129, 711135, 711146, 395681, 395872, 395830, 39520047, 39520034, 39520052, 3952005, G06F 1208, G06F 1316
Patent
active
059182440
ABSTRACT:
The cache keeps regularly accessed disk I/O data within RAM that forms part of a computer systems main memory. The cache operates across a network of computers systems, maintaining cache coherency for the disk I/O devices that are shared by the multiple computer systems within that network. Read access for disk I/O data that is contained within the RAM is returned much faster than would occur if the disk I/O device was accessed directly. The data is held in one of three areas of the RAM for the cache, dependent on the size of the I/O access. The total RAM containing the three areas for the cache does not occupy a fixed amount of a computers main memory. The RAM for the cache grows to contain more disk I/O data on demand and shrinks when more of the main memory is required by the computer system for other uses. The user of the cache is allowed to specify which size of I/O access is allocated to the three areas for the RAM, along with a limit for the total amount of main memory that will be used by the cache at any one time.
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Bragdon Reginald G.
EEC Systems, Inc.
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