Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-08-15
2006-08-15
Whitmore, Stacy A. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
07093228
ABSTRACT:
A method and system for performing optical proximity correction (OPC) on an integrated circuit (IC) chip design is disclosed. The system and method of the present invention includes dividing the IC chip into a plurality of local task regions, identifying congruent local task regions, classifying congruent local task regions into corresponding groups, and performing OPC for each group of congruent local task regions.By identifying and grouping congruent local task regions in the IC chip, according to the method and system disclosed herein, only one OPC procedure (e.g., evaluation and correction) needs to be performed per group of congruent local task regions. The amount of data to be evaluated and the number of corrections performed is greatly reduced because OPC is not performed on repetitive portions of the IC chip design, thereby resulting in significant savings in computing resources and time.
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Andreev Alexandre
Ivanovic Lav
Pavisic Ivan
Levin Naum
LSI Logic Corporation
Strategic Patent Group Inc.
Whitmore Stacy A.
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