Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2004-10-06
2010-06-08
Bataille, Pierre-Michel (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S137000
Reexamination Certificate
active
07734874
ABSTRACT:
A method and system for caching data such as audio, video and/or other data uses information including future access request information for improved caching performance. According to an exemplary embodiment, a cache system includes a cache operative to cache a plurality of data items. A processor is operative to enable at least one of the data items in the cache to be replaced using future access request information for the at least one data item.
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Megiddo, Nimrod; Modha, Dharmendra. “ARC: A Self-Tuning, Low Overhead Replacement Cache.” Proceedings of FAST '03: 2nd USENIX Conference on File and Storage Technologies. USENIX Association, 2003. pp. 115-130.
Search Report dated Sep. 14, 2006.
Li Jun
Verma Snigdha
Zhang Junbiao
Bataille Pierre-Michel
Lin Reitseng
Opalach Joseph J.
Shedd Robert D.
Thomson Licensing
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