Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2008-04-22
2008-04-22
Sough, Hyung S. (Department: 2188)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S206000, C711S207000
Reexamination Certificate
active
07363463
ABSTRACT:
A method of virtualizing memory through shadow page tables that cache translations from multiple guest address spaces in a virtual machine includes a software version of a hardware tagged translation look-aside buffer. Edits to guest page tables are detected by intercepting the creation of guest-writable mappings to guest page tables with translations cached in shadow page tables. The affected cached translations are marked as stale and purged upon an address space switch or an indiscriminate flush of translations by the guest. Thereby, non-stale translations remain cached but stale translations are discarded. The method includes tracking the guest-writable mappings to guest page tables, deferring discovery of such mappings to a guest page table for the first time until a purge of all cached translations when the number of untracked guest page tables exceeds a threshold, and sharing shadow page tables between shadow address spaces and between virtual processors.
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Bailey David S.
Sheu John Te-Jui
Traut Eric P.
Vega Rene Antonio
McFadden Michael B
Microsoft Corporation
Sough Hyung S.
Woodcock & Washburn LLP
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