Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
1999-07-30
2002-05-14
Niebling, John F. (Department: 2812)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
06389585
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to a method and system for manufacturing data processing systems in general, and in particular to a method and system for manufacturing a multiprocessor data processing system. Still more particularly, the present invention relates to a method and system for building a multiprocessor data processing system on a multichip module.
2. Description of the Prior Art
A multiprocessor (MP) data processing system typically includes at least two processors along with several cache components per processor. An MP data processing system can be built in a multichip module (MCM) by combining various functional components, such as those mentioned above, that are all fabricated on a single semiconductor wafer.
Because the cost of rework and test time has been increasing, the rework of an MCM is becoming technically inviable. Thus, redundancy is typically included on an MCM to avoid rework costs and technical problems. Redundancy can be provided by including additional components that are beyond the number of components needed within the MCM in which an MP data processing system is built. Thus, when building an MP data processing system on an MCM, one challenge is to define the association between functional processor components and their respective cache components while retaining optimal wiring paths within the MCM. The present disclosure provides an improved method and system for building an MP data processing system in an MCM.
SUMMARY OF THE INVENTION
In accordance with a preferred embodiment of present invention, a component among a collection of components on a multichip module is identified. The collection of components, which includes both processors and cache components, and each of the components may be functional or non-functional. A determination is made as to whether or not the identified component is functional. In response to a determination that the identified component is functional, the process of component association is performed between the identified component and other functional components on the multichip module such that interconnect length between all functional components can be minimized.
All objects, features, and advantages of the present invention will become apparent in the following detailed written description.
REFERENCES:
patent: 5414637 (1995-05-01), Bewrtin
patent: 5539652 (1996-07-01), Tegethoff
patent: 5543640 (1996-08-01), Sutherland
patent: 5808919 (1998-09-01), Priest
patent: 5838583 (1998-11-01), Varadarajan
patent: 6123736 (2000-09-01), Pavisic
Masleid Robert Paul
Muhich John Stephen
Tuvell Amy May
Bracewell & Patterson L.L.P.
England Anthony V.S.
International Business Machines - Corporation
Niebling John F.
Whitmore Stacy
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