Method and system for buffering multiple requests from...

Details Method and system for buffering multiple requests from... Method and system for buffering multiple requests from...

2007-04-17

2007-04-17

Kim, Matthew (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Shared memory area

C711S149000, C711S168000, C711S219000

Reexamination Certificate

active

10102990

ABSTRACT:
A system for sharing a computational resource by buffering multiple requests from multiple devices to a memory (e.g. a multi-port RAM or FIFO) in a single clock cycle. The system includes a memory having a first write port and a second write port. A first request input is coupled to the first write port. A second request input is coupled to the second write port. A controller is coupled to the memory. The controller is configured to control the memory to store a first request into the memory via the first write port and a second request into the memory via the second write port. The first and second requests are received via the first and second request inputs and stored into the memory in one clock cycle. Requests are removed from the memory sequentially at a rate that is determined by the shared computational resource.

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