Method and system for buffer management

Details Method and system for buffer management Method and system for buffer management

2001-04-05

2004-03-02

Bella, Matthew C. (Department: 2676)

Computer graphics processing and selective visual display system

Computer graphics display memory system

Graphic display memory controller

C345S520000, C345S522000, C345S558000, C345S564000

Reexamination Certificate

active

06700582

ABSTRACT:

This application incorporates by reference Taiwanese application Ser. No. 89106479, filed on Apr. 7, 2000.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates in general to a method and system for buffer management, and more particularly to a management method and system for ring buffer and multiple buffer for accelerated graphic port (AGP) interface.
2. Description of the Related Art
Referring to
FIG. 1
, it illustrates the partial structure of a conventional computer system in block diagram form. A central process unit (CPU)
102
reads data from or writes data into a memory
106
through a chipset
104
, such as a north bridge, and the chipset
104
is coupled to a multimedia chip
110
through a bus
108
such as an AGP bus or a peripheral component interface (PCI) bus, wherein the multimedia chipset
110
is employed to process audio, video, and graphic data.
In the computer system, the CPU
102
communicates with the multimedia chip
110
via the chip set
104
. Since the multimedia chip
110
have to handle and execute a large amount of computation, when the CPU
102
sends a command signal to the multimedia chip
110
, it takes a certain time for the CPU
110
to wait for a command signal being executed by the multimedia chip
110
. Thus, it will degrade the performance of the CPU
102
. In this way, an AGP buffer is employed to reduce this degradation.
AGP buffer
112
is a storage area in the memory
106
, which is used to store AGP command data_associated with multimedia commands to be sent by the CPU
102
to the multimedia chip
110
. Firstly, the CPU
102
writes AGP command data into the AGP buffer
112
. Next, the multimedia chip
110
reads the AGP command data from the AGP buffer
112
and executes the AGP command data. In addition, the AGP buffer
112
can be modified by the chipset. Further, at a certain time, the AGP buffer
112
can be only read or written. During writing, the CPU
102
should avoid from writing data into a portion in the AGP buffer
112
that has not been read; and during reading, the multimedia chip
110
should avoid reading from a portion in the AGP buffer
112
into which data has not been written.
Referring to
FIGS. 2A-2D
, they illustrate a partial structure of another conventional computer system using integrated chipset
202
,
206
,
208
, and
210
respectively.
In
FIG. 2A
, the CPU
102
accesses the memory
106
through the integrated chipset
202
. The integrated chipset
202
includes the chipset
104
and multimedia chip
110
, where between the chipset
104
and the multimedia chip
110
, there is an internal interface
204
, such as an AGP like interface or a peripheral component interconnect (PCI) like interface.
In
FIG. 2B
, the integrated chipset
206
includes the CPU
102
and chipset
104
. In addition, the CPU
102
accesses the memory
106
by using the chipset
104
via the bus
108
.
In
FIG. 2C
, the integrated chipset
208
includes the CPU
102
, chipset
104
, and multimedia chip
110
. Likewise, the internal interface between the chipset
104
and the multimedia chip can be an AGP like interface or a PCI like interface, for instance.
In
FIG. 2D
, the integrated chipset
210
includes the CPU
120
and the multimedia chip
110
.
Referring now to
FIG. 3
, it illustrates the relation among software and hardware components in the conventional computer system. Application program (AP)
302
is a program directly communicating with a user. Operating system (OS)
304
includes application program interface (API)
306
and driver interface
308
. In addition, a device driver
312
controls the multimedia chip
110
. The API
306
, defined by the OS
304
, is the interface between the OS
304
and AP
302
for support function calls by the AP
304
. The driver interface
308
, defined by the OS
304
, is the interface between the OS
304
and the device driver
312
. Besides, the device driver
308
programs the multimedia chip
110
so as to manage the AGP buffer
112
. To be specific, programming the multimedia chip
110
is to read and write to registers (not shown) associated with the multimedia chip
110
, where the registers can be designed as ones inside the multimedia chip
110
or chipset
104
.
Referring to
FIG. 4
, it illustrates a first conventional approach with an AGP buffer. Beginning register
402
is to store the beginning address of the AGP buffer
112
while ending register
406
is to store the ending address of the AGP buffer
112
. Alternatively, the length of the AGP buffer
112
can be stored in the ending register
406
, leading to the same effect. For this example, the ending register
406
is to store the ending address of the AGP buffer
112
.
The device driver
312
controls the multimedia commands to be sent by the CPU
102
to the multimedia chip
110
. First, the AGP command data associated with the multimedia commands are written into the AGP buffer
112
. Then, the multimedia chip
10
reads and executes the AGP command data in the AGP buffer
112
.
Referring to
FIG. 5
, it illustrates a method for managing the AGP buffer shown in FIG.
4
. First, the method begins in step
502
, where the device driver
312
writes the AGP command data into the AGP buffer
112
. Then, the method proceeds to step
504
. In step
504
, the device driver
312
sets the beginning register
402
and the ending register
406
. That is, the beginning and ending addresses of the AGP buffer
112
are written into the beginning register
402
and the ending register
406
, respectively. Next, step
506
is performed, where the device driver
312
triggers the multimedia chip
110
to start reading the AGP command data in the AGP buffer
112
. Then, the method proceeds to step
508
. In step
508
, it is determined whether the device driver
312
has AGP command data left to be written into the AGP buffer
112
. If yes, step
510
is performed; otherwise, the method ends.
In step
510
, a determination is made whether the multimedia chip
110
is idle. That is to determine whether the multimedia chip
110
stops accessing the AGP buffer
112
and stays idle. If yes, step
502
is repeated, where the device driver
312
writes AGP command data into the AGP buffer
112
. If not, step
510
is repeated. In this way, the device driver
312
can continue to write AGP command data into the AGP buffer
112
only if the multimedia chip
110
is idle.
In the method above, step
502
and step
504
are interchangeable. In addition, in each iteration from steps
502
to
510
, the AGP buffer
112
can correspond to different area in the memory
106
.
However, the method has a disadvantage of inefficiency. Since the method does not use read pointer to indicate the address that the multimedia chip
110
uses during performing reading on the AGP buffer
112
, the device driver
312
must be waiting to perform reading until the multimedia chip
100
is idle, resulting in a waste of time. Besides, this makes the CPU
102
cannot execute other application and the multimedia chip
110
resumes operating after a waiting time. Moreover, in order to prevent the multimedia chip
110
from reading the portion of the AGP buffer
112
having not been written into, the device driver
312
triggers the multimedia chip
110
only after completing read operations on the AGP buffer
112
. In this way, the multimedia chip
110
can perform reading on the AGP buffer
112
.
Referring to
FIG. 6
, it illustrates another conventional AGP buffer. A first beginning register
602
and a first ending register
604
are used for storing the beginning and ending addresses of a first AGP buffer
606
respectively. A second beginning register
608
and a second ending register
610
are used for storing the beginning and ending addresses of a second AGP buffer
612
respectively. In addition, the AGP buffer
112
includes the first AGP buffer
606
and second AGP buffer
612
.
FIG. 7
shows a method for managing AGP buffers in
FIG. 6
in a flow chart. The method begins and proceeds to step
702
. In step
702
, the d

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