Method and system for analytical placement of components for...

Details Method and system for analytical placement of components for... Method and system for analytical placement of components for...

2007-10-16

2007-10-16

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

Reexamination Certificate

active

10966269

ABSTRACT:
A method of performing analytical placement of components for a circuit design can include the steps of modifying an analytical formulation for placement of the circuit design a priori (when the circuit design or programmable device fabric includes inhomogeneous components) providing a modified analytical formulation and applying the modified analytical formulation during placement of the circuit design. The step of modifying can optionally include introducing terms into the analytical formulation that push components away from locations in which they cannot reside (such as a large hole in the programmable device fabric due to a large, fixed component such as a CPU core) or alternatively or optionally the step of introducing (115) terms into the analytical formulation that pull components that can only reside at a relatively small number of locations towards those locations.

REFERENCES:
patent: 6415425 (2002-07-01), Chaudhary et al.
patent: 6671867 (2003-12-01), Alpert et al.
patent: 6957406 (2005-10-01), Stenz
patent: 2005/0166164 (2005-07-01), Ren et al.
patent: 2005/0166169 (2005-07-01), Kurzum et al.
patent: 2005/0235237 (2005-10-01), Alpert et al.
Hans Eisenmann et al.; “Generic Global Placement and Floorplanning”; DAC '98; Copyright 1998; pp. 269-274.

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