Method and system for addressing a plurality of ethernet...

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation

Reexamination Certificate

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C710S309000, C370S351000

Reexamination Certificate

active

08051233

ABSTRACT:
A method for processing network data is disclosed and may include receiving data via a single bus interface to which each of a plurality of Ethernet controllers are coupled, where the Ethernet controllers are integrated within a single chip. A particular one of the integrated Ethernet controllers may be identified based on information within the received data. The particular one of the integrated Ethernet controllers may be granted access to a shared resource within the single chip. The access to the shared resource may be granted using at least one semaphore register within the shared resource. The particular one of the integrated Ethernet controllers may be granted access to the single bus interface. The information may include a bus identifier, a bus device identifier and/or a bus function identifier. The shared resource may include a nonvolatile memory (NVM).

REFERENCES:
patent: 6052751 (2000-04-01), Runaldue et al.
patent: 6265885 (2001-07-01), Luo et al.
patent: 6400730 (2002-06-01), Latif et al.
patent: 6425034 (2002-07-01), Steinmetz et al.
patent: 6594712 (2003-07-01), Pettey et al.
patent: 6754749 (2004-06-01), Mounsef et al.
patent: 6816938 (2004-11-01), Edara et al.
patent: 6850995 (2005-02-01), Shishizuka et al.
patent: 6898732 (2005-05-01), Trehus et al.
patent: 6993617 (2006-01-01), Butcher et al.
patent: 7062615 (2006-06-01), Miller et al.
patent: 7142557 (2006-11-01), Dhir et al.
patent: 7149823 (2006-12-01), Miller et al.
patent: 7401126 (2008-07-01), Pekkala et al.
patent: 7535913 (2009-05-01), Minami et al.
patent: 2002/0091888 (2002-07-01), Streitenberger et al.
patent: 2003/0065868 (2003-04-01), Riley
patent: 2003/0088683 (2003-05-01), Kitamura et al.
patent: 2003/0135537 (2003-07-01), Mikael et al.
patent: 2004/0062267 (2004-04-01), Minami et al.
patent: 2004/0163106 (2004-08-01), Schrempp et al.
PCI Local Bus Specification, PCI Special Interest Group, Revisions 2.2, Dec. 18, 1998.

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