Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2008-02-06
2009-02-24
Lane, Jack A (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S111000, C711S113000, C711S114000, C711S118000, C711S141000
Reexamination Certificate
active
07496714
ABSTRACT:
A technique for determining when to destage write data from a fast, NVS of a computer system from an upper level to a lower level of storage in the computer system comprises adaptively varying a destage rate of the NVS according to a current storage occupancy of the NVS; maintaining a high threshold level for the NVS; maintaining a low threshold level that is set to be a predetermined fixed amount below the high threshold; setting the destage rate of the NVS to zero when the NVS occupancy is below the low threshold; setting the destage rate of the NVS to be maximum when the NVS occupancy is above the high threshold; linearly increasing the destage rate of the NVS from zero to maximum as the NVS occupancy goes from the low to the high threshold; and adaptively varying the high threshold in response to a dynamic computer storage workload.
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Gill Binny S.
Modha Dharmendra S.
Gibb & Rahman, LLC
International Business Machines - Corporation
Lane Jack A
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