Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Addressing extended or expanded memory
Reexamination Certificate
2007-11-06
2007-11-06
Bragdon, Reginald (Department: 2189)
Electrical computers and digital processing systems: memory
Addressing combined with specific memory configuration or...
Addressing extended or expanded memory
C711S156000
Reexamination Certificate
active
10159317
ABSTRACT:
A method and system is provided for a multi-level memory. The system includes an internal memory and an external memory. Data packets are received through one or more input ports and initially stored in the internal memory. A control unit determines whether there is congestion of resources within the system and transfers data packets to external memory to ease the congestion. Data packets are eventually transferred from the internal or external memory to one or more output ports.
REFERENCES:
patent: 5539893 (1996-07-01), Thompson et al.
patent: 5864539 (1999-01-01), Yin
patent: 5995998 (1999-11-01), Liang
patent: 6324628 (2001-11-01), Chan
patent: 6393021 (2002-05-01), Chow et al.
patent: 6430661 (2002-08-01), Larson et al.
patent: 6606326 (2003-08-01), Herring
patent: 6735679 (2004-05-01), Herbst et al.
patent: 6832265 (2004-12-01), Ma et al.
patent: 6940814 (2005-09-01), Hoffman
patent: 6977940 (2005-12-01), Ahlfors et al.
patent: 2002/0099918 (2002-07-01), Avner et al.
patent: 2002/0172229 (2002-11-01), Parvin et al.
patent: 2002/0188839 (2002-12-01), Noehring et al.
patent: 2003/0103514 (2003-06-01), Nam et al.
patent: 2006/0036705 (2006-02-01), Musoll et al.
U.S. Appl. No. 10/159,616 titled Method and System to Synchronize a Multi-Level Memory filed May 29, 2002 intventor Saxena et al. Application Pending.
Oberai Ashwani
Rastogi Hitesh
Saxena Rahul
Blakely , Sokoloff, Taylor & Zafman LLP
Bragdon Reginald
Intel Corporation
Vo Thanh D.
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