Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Ball or nail head type contact – lead – or bond
Reexamination Certificate
2005-06-21
2005-06-21
Eckert, George (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Ball or nail head type contact, lead, or bond
C257S781000, C257S784000, C257S786000, C257S774000, C257S780000, C257S503000, C257S758000, C438S612000
Reexamination Certificate
active
06909196
ABSTRACT:
A method of reducing parasitic capacitance in an integrated circuit having three or more metal levels is described. The method comprises forming a bond pad at least partially exposed at the top surface of the integrated circuit, forming a metal pad on the metal level below the bond pad and forming an underlying metal pad on each of the one or more lower metal levels. In the illustrated embodiments, the ratio of an area of at least one of the underlying metal pads to the area of the bond pad is less than 30%. Parasitic capacitance is thus greatly reduced and signal propagation speeds improved.
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Akram Salman
Batra Shubneesh
Chaine Michael D.
Johnson Brian
Keeth Brent
Chu Chris C.
Eckert George
Knobbe Martens Olson & Bear LLP
Micro)n Technology, Inc.
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