Method and structure to protect FETs from plasma damage...

Details Method and structure to protect FETs from plasma damage... Method and structure to protect FETs from plasma damage...

2011-01-04

2011-01-04

Pham, Thanh V (Department: 2894)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

C438S276000

Reexamination Certificate

active

07863112

ABSTRACT:
Protecting a FET from plasma damage during FEOL processing by forming a FET-like structure in conjunction with and adjacent to an FET, in a same well as the FET, but having a body doped opposite to the well polarity. The FET-like structure is formed with thinner oxide than the gate oxide of the FET, has a gate structure (poly) connected with the gate of the FET, and may be shorted out by the first metal layer (M1).

REFERENCES:
patent: 5366908 (1994-11-01), Pelella
patent: 5672527 (1997-09-01), Lee
patent: 5705411 (1998-01-01), Yamanobe et al.
patent: 6107131 (2000-08-01), Huang
patent: 6255699 (2001-07-01), Bracchitta et al.
patent: 6417544 (2002-07-01), Jun et al.
patent: 6436754 (2002-08-01), Lee
patent: 6621125 (2003-09-01), Wang
patent: 7595243 (2009-09-01), Bulucea et al.
patent: 2005/0098831 (2005-05-01), Lee et al.
patent: 2008/0308837 (2008-12-01), Gauthier et al.
Watanabe et al, Dielectric Breakdown of Gate Insulator Due to Reactive Ion Etching, Solid State Technology, Apr. 1984, pp. 263-266.

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