Method and structure for using defective unrepairable semiconduc

Details Method and structure for using defective unrepairable semiconduc Method and structure for using defective unrepairable semiconduc

1994-08-03

1996-07-23

Nguyen, Viet Q.

Static information storage and retrieval

Read/write circuit

Bad bit

371 102, 36523001, 36523006, 395412, 395410, G11C 2900, G06F 1200

Patent

active

055396976

ABSTRACT:
An apparatus utilizing a semiconductor memory includes a semiconductor memory with one or more permanent unrepairable defects. The use of defective semiconductor memory that was previously discarded significantly reduces the memory cost of the apparatus. A memory mapping circuit is used to convert an address for a defective memory location within the defective semiconductor memory to an address for a working memory location. The memory mapping circuit is transparent to the apparatus and the defective memory functions as an undefective memory. Consequently, an apparatus using the memory mapping circuit and the defective memory performs as apparatus with a memory that has no unrepairable defects.

REFERENCES:
patent: 5239656 (1993-08-01), Kawano
patent: 5253350 (1993-10-01), Foster et al.
patent: 5359570 (1994-10-01), Hsu et al.
"Improved RAS by Segmenting Memory Using a SRAM and Reserved Area Defective Memory Relocation," IBM TDB, vol. 30, No. 12, May 1988 pp. 204-208.

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