Method and structure for reducing resistance of a...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S413000, C257S751000, C438S592000, C438S625000, C438S642000

Reexamination Certificate

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06943416

ABSTRACT:
A method used to form a semiconductor device comprises forming a polysilicon layer, forming a conductive barrier layer on the polysilicon layer, then forming a conductive nitride layer on the conductive barrier layer. Next, a conductive amorphous layer is formed on the conductive barrier layer, and an elemental metal layer is formed on the conductive amorphous layer. Without the conductive amorphous layer the elemental metal layer would form on the conductive nitride layer as a small grained, high resistance layer, while it forms on the conductive amorphous layer as a large grained, low resistance layer. A semiconductor device which may be formed using this method is also described.

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patent: 2004/0207030 (2004-10-01), McTeer
Copending Application: “Conductive Transistor Structure for a Semiconductor Device and Method for Forming Same”, U.S. Appl. No. 10/418,412, filed Apr. 16, 2003.

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