Method and structure for reducing capacitance between interconne

Details Method and structure for reducing capacitance between interconne Method and structure for reducing capacitance between interconne

1995-08-07

1997-06-24

Niebling, John

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

20419237, 438619, 438699, 438626, H01L 2128

Patent

active

056417128

ABSTRACT:
A method and structure for reducing capacitance between interconnect lines (11, 24, 26) utilizes air gaps (17, 47) between the interconnect lines (11, 24, 26). Deposited over the interconnect lines (11, 24, 26), a silane oxide layer (14) forms a "breadloaf" shape which can be sputter etched to seal the air gaps (17, 47). Prior to the deposition of the sputter etched silane oxide layer (14), spacers (13, 42, 43) can be formed around the interconnect lines (11, 24, 26) to increase the aspect ratio of gaps (23, 31) between the interconnect lines (11, 24, 26) which facilitates the formation of the "breadloaf" shape of the silane oxide layer (14).

REFERENCES:
patent: 4874493 (1989-10-01), Pan
patent: 5001079 (1991-03-01), Van Learhoven et al.
patent: 5107320 (1992-04-01), Iranmanesh
patent: 5192715 (1993-03-01), Sliwa, Jr. et al.
patent: 5278083 (1994-01-01), Hill et al.
patent: 5310700 (1994-05-01), Lien et al.
patent: 5324683 (1994-06-01), Fitch et al.
patent: 5407860 (1995-04-01), Stoltz et al.
patent: 5461003 (1995-10-01), Havemann et al.
patent: 5599745 (1997-02-01), Reinberg
Shin-Puu Jen et al., IEEE, 1994 Symposium on VLSI Technology Digest of Technical Papers, "A Planarized Multilevel Interconnect Scheme With Embedded Low-Dielectric-Constant Polymers For Sub-Quarter-Micron Applications", Apr. 1994, pp. 73-74.

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