Method and structure for packaging an integrated circuit with re

Details Method and structure for packaging an integrated circuit with re Method and structure for packaging an integrated circuit with re

1998-03-17

2000-05-02

Picardat, Kevin M.

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Encapsulating

438112, 438126, H01L 2144

Patent

active

060571799

ABSTRACT:
A method and structure for packaging an integrated circuit with an encapsulant to be readily peeled away from a degating region is disclosed. By applying an additional processing operation before a solder mask is coated over the substrate or during a process for forming the solder mask, an adhesion between the solder mask and the encapsulant is altered to become weaker than the adhesion between the solder mask and the substrate so that the excess encapsulant can be easily peeled away from the degating region without damaging the substrate.

REFERENCES:
patent: 5635671 (1997-06-01), Freyman et al.
patent: 5852870 (1998-12-01), Freyman et al.
patent: 5886398 (1999-03-01), Low et al.
patent: 5961912 (1999-10-01), Huang et al.
patent: 5982625 (1999-11-01), Chen et al.

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