Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices
Reexamination Certificate
2011-08-16
2011-08-16
Mandala, Victor (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
For plural devices
C257SE23023, C257SE23011, C257SE23021, C257SE25013
Reexamination Certificate
active
07999377
ABSTRACT:
The process begins with separate device wafers having complimentary chips. Thin metal capture pads, having a preferred thickness of about 10 microns so that substantial pressure may be applied during processing without damaging capture pads, are deposited on both device wafers, which are then tested and mapped for good chip sites. A handle wafer is attached to one device wafer, which can then be thinned to improve via etching and filling. Capture pads are removed and replaced after thinning. The device wafer with handle wafer is diced, and good chips with attached portions of the diced handle wafer are positioned and bonded to the good chip sites of the other device wafer, and the handle wafer portions are removed. The device wafer having known good 3-D chips then undergoes final processing.
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DeMulder Edward M.
Knickerbocker Sarah H.
Shapiro Michael J.
Young Albert M.
Abate Joseph P.
International Business Machines - Corporation
Mandala Victor
Moore Whitney
Whitham, Curtis, Christofferson & Cook, P.C
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