Method and structure for modular, highly linear MOS...

Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region

Reexamination Certificate

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C438S264000, C438S594000, C438S766000

Reexamination Certificate

active

06764930

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates, most generally, to semiconductor devices and methods for forming the same. More particularly, the present invention relates to highly linear MOS capacitors and a method for forming the same which utilizes nitrogen implantation.
BACKGROUND OF THE INVENTION
MOS (metal oxide semiconductor) capacitors are formed in silicon substrates and typically utilize a highly doped section of the silicon substrate as a lower capacitor electrode. In order to minimize fabrication time and costs, it is generally desirable to minimize the number of processing operations used in forming a particular semiconductor structure, as well as the completed, integrated circuit device. As such, the capacitor dielectric for MOS capacitors is commonly formed over the lower electrode during a thermal oxidation process used to simultaneously form gate oxides in transistor regions on the same substrate. When highly N-doped silicon substrate regions are used to form lower electrodes for MOS capacitors, however, Fermi level oxidation enhancement causes the thermal oxide thickness formed over the lower electrode to increase greatly with respect to the gate oxide being simultaneously formed on an undoped region of the same silicon substrate. This thermal oxide of increased thickness will serve as the capacitor dielectric and such a capacitor dielectric of increased thickness drastically and undesirably reduces capacitance density when measured per unit of silicon surface area.
What is needed, therefore, is a method which utilizes N-doped regions of silicon substrates to make linear MOS capacitors but which suppresses the undesirable enhanced oxide growth in the N-doped silicon regions.
SUMMARY OF THE INVENTION
To achieve these and other objects, and in view of its purposes, the present invention addresses the shortcomings of the metal oxide semiconductor (MOS) capacitor formation processes and structures known to the prior art and provides a method for utilizing highly N-doped regions of silicon substrates as lower electrodes of capacitors, while suppressing Fermi level oxidation enhancement of the N-doped regions. The present invention describes materials, processes, and structures used to produce linear MOS capacitors having high capacitance densities and which utilize portions of an N-doped silicon substrate as a lower capacitor electrode.
The present invention provides for introducing nitrogen into the highly N-doped silicon region which is to be used as the lower capacitor electrode. The semiconductor substrate is then thermally oxidized to form an oxide film on the semiconductor surface including within the N-doped region. The presence of nitrogen in the N-doped region suppresses the enhanced growth of the thermal oxide film formed to serve as the capacitor dielectric. The oxide film includes a thickness in the nitrogen region which is less than the thickness of the same oxide film simultaneously formed in other regions of the N-doped regions. The N-doped region in which nitrogen is introduced, serves as the lower electrode of the capacitor formed. The introduction of nitrogen also maintains the resistance of the highly N-doped silicon electrode at a low value, which reduces the effect of voltage on the capacitance and thereby produces a linear capacitor. The method and structure of the present invention is easily integrable into conventional processing sequences used to form semiconductor devices.


REFERENCES:
patent: 5236573 (1993-08-01), Shannon
patent: 5750428 (1998-05-01), Chang
patent: 5854114 (1998-12-01), Li et al.
patent: 5904575 (1999-05-01), Ishida et al.
patent: 5942780 (1999-08-01), Barsan et al.
patent: 6093946 (2000-07-01), Li et al.
patent: 6255169 (2001-07-01), Li et al.
patent: 2002/0190310 (2002-12-01), Bolvin

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