Method and structure for loading data into several IC devices

Details Method and structure for loading data into several IC devices Method and structure for loading data into several IC devices

1995-05-26

1997-06-17

Westin, Edward P.

Electronic digital logic circuitry

Multifunctional or programmable

Having details of setting or programming of interconnections...

326 40, 364716, H03K 19177

Patent

active

056401060

ABSTRACT:
An apparatus and method for decreasing the amount of time necessary to load configuration data into Field Programmable Gate Arrays (FPGAs) or other integrated circuit devices. In a preferred embodiment, serially arrayed FPGAs receive a concatenated stream of data from a common data bus. As a first FPGA reaches a loading-complete state, an enabling token is passed from the first FPGA to an enabling input on the next FPGA. The process repeats until all devices are completely loaded or fully configured.

REFERENCES:
patent: 4942319 (1990-07-01), Pickett et al.
patent: 4963768 (1990-10-01), Arawal et al.
patent: 5394031 (1995-02-01), Britton et al.
patent: 5394032 (1995-02-01), Conzelmann et al.
patent: 5493239 (1996-02-01), Zlotnick

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