Method and structure for joining two substrates with a low...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Ball or nail head type contact – lead – or bond

Reexamination Certificate

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C257S780000, C257S779000, C438S613000

Reexamination Certificate

active

06583517

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to an electronic structure and associated method joining two substrates with a low melt solder.
2. Related Art
Joining a chip to a chip carrier by completely melting a solder ball to form a solder joint between the chip and chip carrier may leave a gap between the chip and the chip carrier, such that the gap is too small to effectively fill with underfill. The underfill would encapsulate the solder joint to protect the solder joint from stresses induced during thermal cycling, wherein the thermal stresses result from a mismatch of coefficient of thermal expansion (CTE) between the chip and the chip carrier.
Thus, there is a need for an economical method and structure that enables underfill to effectively fill a gap between a chip and a chip carrier after the chip and the chip carrier are joined by completely melting a solder ball to form a solder joint between the chip and chip carrier.
SUMMARY OF THE INVENTION
The present invention provides an electrical structure, comprising:
a first substrate, having a first electrically conductive pad thereon;
a second substrate, having a second electrically conductive pad thereon; and
a solder joint that mechanically and electrically joins the first pad to the second pad, wherein the solder joint includes a low-melt alloy composition, and wherein the second pad has a geometry that compels a gap size of a gap between the first substrate and the second substrate to exceed a distance between the first substrate and a surface of the second pad.
The present invention provides an electrical structure, comprising:
a first substrate, having a first electrically conductive pad thereon;
a second substrate, having a second electrically conductive pad thereon; and
a solder joint that mechanically and electrically joins the first pad to the second pad, wherein the solder joint includes a low-melt alloy composition, and wherein the second pad has a geometry that compels a gap between the first substrate and the second substrate to have a gap size of at least about 2 mils.
The present invention provides a method for forming an electrical structure, comprising:
providing a first substrate, having a first electrically conductive pad thereon;
providing a second substrate, having a second electrically conductive pad thereon; and
forming a solder joint that mechanically and electrically joins the first pad to the second pad, wherein the solder joint includes a low-melt alloy composition, and wherein the second pad has a geometry that compels a gap size of a gap between the first substrate and the second substrate to exceed a distance between the first substrate and a surface of the second pad.


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patent: 6433426 (2002-08-01), Ikegami et al.

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