Method and structure for increasing effective transistor...

Static information storage and retrieval – Systems using particular element – Amorphous

Reexamination Certificate

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C365S148000, C365S063000, C365S072000, C365S243000

Reexamination Certificate

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07447062

ABSTRACT:
A memory structure, includes: an array of individual memory cells arranged in a network of bit lines and word lines, each individual memory cell further comprising a resistive memory device that is capable of being programmed to a plurality of resistance states, each of the resistive memory devices coupled to one of the bit lines at a first end thereof; a rectifying element in series with each of the resistive memory devices at a second end thereof; an access transistor associated with each of the individual memory cells, the access transistors activated by a signal applied to a corresponding one of the word lines, with each access transistor connected in series with a corresponding rectifying element; and a common connection configured to short neighboring rectifying devices together along a word line direction, in groups of two or more.

REFERENCES:
patent: 5912839 (1999-06-01), Ovshinsky et al.
patent: 6067249 (2000-05-01), Lee et al.
patent: 6356477 (2002-03-01), Tran
patent: 6606263 (2003-08-01), Tang
patent: 7154798 (2006-12-01), Lin et al.
patent: 2006/0067112 (2006-03-01), Ferrant et al.

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