Method and structure for forming a trench within a semiconductor

Details Method and structure for forming a trench within a semiconductor Method and structure for forming a trench within a semiconductor

1992-03-24

1993-08-31

Chaudhuri, Olik

Metal treatment

Barrier layer stock material, p-n type

With non-semiconductive coating thereon

437978, H01L 2300

Patent

active

052405125

ABSTRACT:
A method and structure for forming a trench within a semiconductor layer (12) of material is provided. A first mask structure comprising a third insulating layer (20) and a fourth insulating layer (22) is formed adjacent a semiconductor layer (12). Sidewall spacers comprising a first and second portion (30) and (32) are formed along the sidewall (25) of layers (20) and (22) and extending outwardly the refrom. A second mask structure comprising a field insulating region (36) is formed adjacent first sidewall spacer portions (30) and along semiconductor layer (12). The foot portions (34) of first sidewall spacer portions (30) are removed thereby defining an exposed area (38) between the first mask structure and second mask structure. A trench (40) may then be formed between the two mask structures and filled with dielectrical material in order to isolate a semiconductor mesa (42) from semiconductor regions (44a) and 44b).

REFERENCES:
patent: H204 (1987-02-01), Oh et al.
patent: 4462846 (1984-07-01), Varshney
patent: 4750971 (1988-06-01), Maas et al.
patent: 5004703 (1991-03-01), Zdebel et al.
patent: 5096848 (1992-03-01), Kawamura

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