Printing – Stenciling – Stencils
Reexamination Certificate
2001-06-28
2002-08-06
Funk, Stephen R. (Department: 2854)
Printing
Stenciling
Stencils
C101S129000, C101S128210
Reexamination Certificate
active
06427587
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to applying a predetermined volume of material to a predetermined location on a substrate and, more particularly, to the use of a stencil having apertures that minimize the shear stress of a material applied using the stencil to a substrate.
2. State of the Art
The use of screen printing stencils is well known in the art. Screen printing stencils are used in a wide variety of applications in the electronic substrate fabrication and electronic assembly industry for applying materials such as photo resist or solder paste.
As the size of the features of a semiconductor device continues to decrease with each generation, ever greater precision is required in order to apply viscous material to the surface thereof. This includes the application of solder paste to the surface of a printed circuit board or die of securing a flip chip thereto. Metal stencils are currently utilized to apply the solder paste onto the surface for connecting the contact pads of surface mounted flip chips. These stencils typically have a plurality of apertures that are formed in the stencil in predetermined locations that correspond to the pattern of the contact pads on the printed circuit board of choice.
In use, these stencils are positioned near or on the surface of the printed circuit board, the apertures in the stencil are aligned over the contact pads upon which the solder paste is to be applied, the solder paste is then urged mechanically through the apertures via a wiper, and the stencil is removed, leaving small islands of solder paste remaining on the contact pads of the printed circuit board.
One problem associated with the use of stencils is that an uneven, or varying, amount of solder may be placed across the contact pads of the printed circuit board. This adds to a lack of planarity across the printed circuit board contact pads which may cause a subsequent rework operation. Further, excess solder paste can be applied that results either in shorting or bridging between adjacent contact pads on the printed circuit board.
Another problem associated with the use of stencils is that the ratio of the height of the material to area occupied by the material is limited by the release of the material from apertures of the stencil. This material release is a function of the cohesive forces within the material and the cohesive forces between the material and stencil. As the size of the aperture dimensions decreases, the base cross-sectional area of the aperture decreases; however, it is still desirable to keep the material being applied through the aperture in the stencil at the same vertical size or height, or greater. Further, such material applied through the apertures of the stencil must be placed very close together. Unfortunately, current technology requires that as the vertical size or height increases, the base cross-sectional area of an aperture of the stencil must increase as well for release of the material applied through the apertures. This limits the pitch or spacing of the apertures in the stencil.
One prior art solution to this problem has been to taper the wall of an aperture in the stencil so that the aperture is wider or has a larger cross-sectional base area on the substrate side to provide an improved release of the material from the aperture. Unfortunately, since the taper of the aperture in the stencil is small with the aperture wall being substantially vertical, thereby providing a small increase in the cross-sectional base area of the aperture located adjacent the substrate, the material applied through the aperture can be pulled away from the substrate when the stencil is removed, thus resulting in the same problem as before.
U.S. Pat. No. 5,359,928, issued Nov. 1, 1994, discloses a screen printing stencil that has raised edges surrounding the apertures. The apertures also include tapered edges that provide a larger area at the portion of the stencil surface adjacent the substrate.
U.S. Pat. No. 5,460,316, issued Oct. 24, 1995, also discloses the use of stencils and apertures with tapered walls. The apertures having tapered walls provide a larger cross-sectional base area of the aperture adjacent the substrate than at the cross-sectional area at the opening or top of the aperture into which the solder paste is applied to the stencil. In both references, the larger cross-sectional base area of the aperture in the stencil is provided to reduce the amount of solder paste pulled away when the stencil is removed; however, the stencils require a larger cross-sectional base area for increased height or thickness of the solder pasted being applied through the aperture to the substrate.
Accordingly, it would be advantageous to overcome the problems inherent in the prior art solutions of using stencils while retaining sufficient material applied to the substrate upon removing the stencil in order to manufacture increased height or thicknesses of material applied through the apertures in the stencil while facilitating a reduced pitch or spacing of the apertures in the stencil.
BRIEF SUMMARY OF THE INVENTION
The present invention is directed to a stencil for use in applying material to semiconductor devices during the fabrication thereof. The stencil of the present invention includes apertures having a portion formed by a first wall extending from a first side of the stencil and a portion formed by a second wall extending from the second side of the stencil to minimize the shear stress between the stencil and the material being applied to the semiconductor device. The stencil allows material to be extruded through the portion formed by the first wall of each aperture of the stencil to the surface of the semiconductor device without contacting the wall of the second portion of the aperture of the stencil. Since the material only contacts a small area of the portion formed by the first wall of the aperture in the stencil, substantially all the material applied through the aperture remains on the semiconductor device and not in the aperture of the stencil.
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Cobbley Chad
Grigg Ford B.
Funk Stephen R.
Micro)n Technology, Inc.
TraskBritt
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