Static information storage and retrieval – Read/write circuit – Testing
Patent
1996-12-24
1998-03-03
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Testing
365210, 365200, G11C 1300
Patent
active
057242909
ABSTRACT:
The invention relates to a programming method and device for detecting an error and inhibiting writing into a memory. The invention provides for the inclusion, in the standard programming method, of a checking step for interrupting the programming procedure and generating an error signal detecting the attempted overwriting of a "0" with a "1". The checking step of the inventive programming method provides for an initial comparison between the contents of a plurality of bits being programmed and a corresponding plurality of bits to be written in, the generation of an error signal upon detection of homolog pairs with a value of "one", and the interruption of the byte programming procedure to prevent a "1" from being written over a "0".
REFERENCES:
patent: 4763305 (1988-08-01), Kuo
patent: 4811294 (1989-03-01), Kobayashi et al.
patent: 5287326 (1994-02-01), Hirata
Cane Marcello
Sali Mauro
Villa Corrado
Fears Terrell W.
SGS-Thomson Microelectronics S. r. l.
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