Method and profiling cache for management of virtual memory

Details Method and profiling cache for management of virtual memory Method and profiling cache for management of virtual memory

2006-08-08

2006-08-08

Kim, Matthew (Department: 2185)

Electrical computers and digital processing systems: memory

Address formation

Address mapping

C711S202000, C711S206000, C711S200000, C711S203000, C711S159000, C711S160000, C711S128000, C711S133000, C711S108000

Reexamination Certificate

active

07089396

ABSTRACT:
A method and profiling cache for management of virtual memory includes a set of entries stored in the profiling cache. Each entry of the set of entries includes a page address, a time stamp for the page address and a least recently used (LRU) count; and the LRU count is updated for each access of the page address. Entries in the profiling cache are cast out using the LRU counts. A translation lookaside buffer (TLB) includes a first TLB section for storing a plurality of temporarily pinned entries and a second TLB section for storing a plurality of non-pinned entries. Responsive to a TLB interrupt, an entry is loaded in the second TLB section using a first in first out algorithm for replacing the non-pinned entries. The first TLB portion is periodically updated utilizing identified ones of the set of entries in the profiling cache having oldest time stamps.

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