Method and processor including logic for storing traces...

Details Method and processor including logic for storing traces... Method and processor including logic for storing traces...

2007-05-01

2007-05-01

Elmore, Stephen C. (Department: 2185)

Electrical computers and digital processing systems: memory

Address formation

Generating a particular pattern/sequence of addresses

C711S003000, C711S200000, C711S218000, C365S230010, C365S230030, C712S208000, C712S211000

Reexamination Certificate

active

10755742

ABSTRACT:
A processor includes a trace cache memory coupled to a trace generator. The trace generator may be configured to generate a plurality of traces each including one or more operations that may be decoded from one or more instructions. Each of the operations may be associated with a respective address. The trace cache memory is coupled to the trace generator and includes a plurality of entries each configured to store one of the traces. The trace generator may be further configured to restrict each of the traces to include only operations having respective addresses that fall within one or more predetermined ranges of contiguous addresses.

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