Method and processor for selectively marking instructions as int

Electrical computers and digital data processing systems: input/ – Interrupt processing – Interrupt inhibiting or masking

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710260, 710261, 712244, G06F 930

Patent

active

060292229

ABSTRACT:
Each of microcodes 1 has an interrupt prohibit bit 10 that specifies acceptance or nonacceptance of an interrupt request. Upon occurrence of an interrupt request, a processor refers to a value set in the interrupt prohibit bit 10 of the microcode 1 being currently executed. When "0" is set to the interrupt prohibit bit 10, the processor accepts the interrupt request, and when "1" is set to the interrupt prohibit bit 10, the processor rejects the interrupt request and starts executing a succeeding microcode. This allows the processor to safely execute certain instructions without interruption, as indicated by the interrupt prohibit bit 10 contained in the microcode 1 being currently executed.

REFERENCES:
patent: 3578918 (1971-05-01), Lucas et al.
patent: 4498136 (1985-02-01), Sproul, III
patent: 5218712 (1993-06-01), Cutler et al.
patent: 5471595 (1995-11-01), Yagi et al.
patent: 5513349 (1996-04-01), Horiguchi et al.

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