Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2011-08-16
2011-08-16
Gu, Shawn X (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S114000, C711S119000, C711S141000
Reexamination Certificate
active
08001328
ABSTRACT:
A method and apparatus in which the observability of cross-invalidates requests within remote nodes is controlled at the time of a partial response generation, when a remote request initially checks/snoops the directory state of the remote node, but before such the time that the cross-invalidate request is actually sent to the processors on a given node. If all of the remote nodes in the system indicate that the cross-invalidates could be sent during an initial directory snoop, the requesting node is able to return full exclusivity to a given cache line to a requesting processor at the time when it receives all of the partial responses, instead of having to wait for the final responses from each of the remote nodes within the system.
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H.N. Reddy; Decentralized Load Balancing Algorithm for Dynamic Computer Networks; IBM Techncal Disclosure Bulletin, No. 7a; Dec. 1991; pp. 221-223.
Burckhardt Sebastian C.
O'Neill Arthur J.
Papazova Vesselina K.
Walters Craig R.
Campbell John E.
Gu Shawn X
International Business Machines - Corporation
McConnell Daniel E.
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