Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output process timing
Reexamination Certificate
2005-06-28
2005-06-28
Gaffin, Jeffrey (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output process timing
C710S002000, C710S058000, C710S062000, C710S065000, C710S067000, C713S501000, C341S029000
Reexamination Certificate
active
06912605
ABSTRACT:
A method for altering timing between transmissions of an input device comprising the steps of (A) receiving a plurality of inputs from the input device, (B) altering the timing between the inputs and (C) presenting the altered inputs in a potentially insecure environment.
REFERENCES:
patent: 6509845 (2003-01-01), Tanaka
patent: 6567016 (2003-05-01), Rajamani et al.
patent: 6640268 (2003-10-01), Kumar
patent: 6715086 (2004-03-01), Himmel et al.
“Timing Analysis of Keystrokes and Timing Attacks on SSH”, By Dawn Xiaodong Song, et al., Aug. 13-17, 2001 (Proceedings of the 10th USENIX Security Symposium), pp. 337-352.
Cypress Semiconductor Corp.
Gaffin Jeffrey
Maiorana PC Christopher P.
Sorrell Eron
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