Method and monitor structure for detecting and locating IC...

Details Method and monitor structure for detecting and locating IC... Method and monitor structure for detecting and locating IC...

2008-01-08

2008-01-08

Le, Dung A. (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Test or calibration structure

C257S115000, C257S123000, C257SE21521, C257SE21524, C438S014000, C438S017000, C438S018000

Reexamination Certificate

active

11189180

ABSTRACT:
A 3-dimensional PCM structure and method for using the same for carrying out 3-dimensional integrated circuit wiring electrical testing and failure analysis in an integrated circuit manufacturing process, the method including forming a first metallization layer; carrying out a first wafer acceptance testing (WAT) process to test the electrical continuity of the first metallization layer; forming first metal vias on the first metallization layer conductive portions and a second metallization layer comprising metal islands on the first metal vias wherein the metal islands electrically communicate with the first metallization layer to form a process control monitor (PCM) structure; and, carrying out a second WAT process to test the electrical continuity of the first metallization layer.

REFERENCES:
patent: 5757079 (1998-05-01), McAllister et al.
patent: 2005/0139767 (2005-06-01), Pinto et al.
patent: 2006/0088949 (2006-04-01), Smayling et al.

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