Semiconductor device manufacturing: process – Making passive device – Planar capacitor
Reexamination Certificate
2006-01-03
2006-01-03
Mai, Anh Duy (Department: 2814)
Semiconductor device manufacturing: process
Making passive device
Planar capacitor
C438S396000, C438S785000
Reexamination Certificate
active
06982205
ABSTRACT:
A fabrication method for forming a semiconductor device having a MIM (Metal-Insulator-Metal) capacitor is provided. A lower electrode is formed on a substrate. The lower electrode is subjected to a pre-annealing. The pre-annealing includes a thermal annealing in a hydrogen atmosphere, a nitrogen atmosphere or a mixed atmosphere of hydrogen and nitrogen. A capacitor dielectric layer is formed on the lower electrode. An upper electrode is formed on the capacitor dielectric layer. According to the present invention, the characteristic of a MIM capacitor can be enhanced by the pre-annealing without any substantial change in the materiality of the lower electrode.
REFERENCES:
patent: 6204203 (2001-03-01), Narwanka et al.
patent: 6303952 (2001-10-01), Aoki et al.
patent: 2002/0037630 (2002-03-01), Agarwal et al.
patent: 5102040 (1993-04-01), None
patent: 9102292 (1997-04-01), None
patent: 11087629 (1999-03-01), None
patent: P1999-0062504 (1999-07-01), None
patent: P2001-0026123 (2001-04-01), None
I.K. Yoo et al., Leakage Current Mechanism and Accelerated Unified Test of Lead Ziconate Titanate Thin Film Capacitors. IEEE 1992, pp. 225-228.
I. Chung et al., Fabrication of Ferroelectric Capacitors Using RuO2/Pt Electrode. IEEE 1996, pp. 93-101.
G.J. Norga et al. Effect of Crystallisation on Fatigue in Sol-Gel PZT Ferroelectric Capacitors with Reactively Sputtered RuO2 Electrode Layers. IEEE 1998, pp. 3-6.
English Abstract of P2001-0026123.
English Abstract of P1999-0062504.
English Abstract of JP5102040.
English Language Abstract of Japanese Patent No. JP9102292, filed Apr. 15, 1997.
English Language Absract of Japanese Patent No. JP11087629.
Joo Jae-Hyun
Kim Wan-Don
Duy Mai Anh
Marger & Johnson & McCollom, P.C.
Samsung Electronics Co,. Ltd.
LandOfFree
Method and manufacturing a semiconductor device having a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and manufacturing a semiconductor device having a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and manufacturing a semiconductor device having a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3594155