Method and management tool for assessing an electronic...

Details Method and management tool for assessing an electronic... Method and management tool for assessing an electronic...

2005-09-07

2008-11-04

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

07448004

ABSTRACT:
A method, management tool, or spreadsheet device that allows a user to analyze, compare, and assess various aspects of an electronic design validation process for an integrated circuit. The exemplary method provides a six-sigma measurement of the effectiveness of an electronic design validation process. Furthermore, various different types of electronic design validation processes can be compared and contrasted for their effectiveness for validating the electronic design throughout the design process.

REFERENCES:
patent: 6651228 (2003-11-01), Narain et al.
patent: 2005/0149311 (2005-07-01), McGaughy
patent: 2005/0278576 (2005-12-01), Hekmatpour

Affiliated with

Also associated with

Rating

Method and management tool for assessing an electronic... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and management tool for assessing an electronic..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and management tool for assessing an electronic... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4046525