Method and jig structure for positioning bare dice

Semiconductor device manufacturing: process – Semiconductor substrate dicing – Having specified scribe region structure

Reexamination Certificate

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Details

C438S106000, C438S064000, C257SE21238, C257SE21329, C257SE21499, C257SE21517

Reexamination Certificate

active

07655540

ABSTRACT:
A method and jig structure for positioning bare dice is disclosed. The jig structure for positioning at least one bare dice includes a trap having at least one positioning groove wherein the depth of the positioning groove is less than the height of the bare dice. Basing on the positioning groove formed in the tray, once a bare dice is placed in the positioning groove, the partially exposed bare dice can be located directly and precisely vacuum-grabbed by a sucker, so that the number of positioning steps is reduced.

REFERENCES:
patent: 6453096 (2002-09-01), Kim et al.
patent: 7407863 (2008-08-01), Hsieh et al.

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