Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1997-01-29
2000-03-28
Chaudhuri, Olik
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257386, H01L 2976
Patent
active
060435429
ABSTRACT:
An integrated circuit structure for preventing latch-up of an integrated circuit device, such as a dynamic random access memory, that is operated with a negative substrate bias in use of the device. The integrated circuit structure includes a p-type substrate having an n-well region formed therein, with a rectifying junction formed in a lightly doped portion of the n-well region and connected to provide a path to ground for clamping the substrate to ground during power-up conditions. In another embodiment, a rectifying junction formed in a lightly doped portion of the n-well region functions as a diode clamp for a pumped bias voltage for the n-well region. In forming the rectifying junction in the n-well region, the n-plus ion implantation mask that is used in forming n-plus doped regions in the n-well region is used to mask portions of the n-well region during the n-plus ion implantation process and a metal barrier layer is formed on the exposed lightly doped portions of the n-well region, so that a Schottky diode is formed. Also described is a method for fabricating an integrated circuit structure which includes forming a rectifying junction in the well portion for providing a diode clamp between voltage sources of the integrated circuit structure.
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"IBM Technical Disclosure Bulletin, vol. 29, No. 5", 1967, (1986).
Furuyama, T., et al., "A Latch-Up-Like New Failure Mechanism for High-Density CMOS Dynamic RAM's", IEEE J. of Solid-State Circuits, 25, 42-47, (1990).
Herman, L., "Overcoming the Problems of SCR Latchup", New Electronics, 4, 44-50, (1986).
Keeth Brent
Kerr Robert B.
Chaudhuri Olik
Micro)n Technology, Inc.
Wille Douglas A.
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