Method and end cell library for avoiding substrate noise in...

Details Method and end cell library for avoiding substrate noise in... Method and end cell library for avoiding substrate noise in...

2005-12-29

2008-08-05

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C257S127000, C257S170000, C257S401000, C257S409000, C257S484000, C438S405000

Reexamination Certificate

active

07409660

ABSTRACT:
A method of avoiding substrate noise in an integrated circuit includes steps of receiving as input an integrated circuit design that includes at least a portion of a block for placement and routing on a substrate and an outer boundary of the block. An end cell is selected from a set of end cells for terminating the block in an outer area that extends from the outer boundary to an end cell boundary outside the block. The selected end cell is placed in the outer area to isolate the block electrically from the substrate.

REFERENCES:
patent: 5475255 (1995-12-01), Joardar et al.
patent: 6424022 (2002-07-01), Wu et al.
patent: 6879023 (2005-04-01), Gutierrez
patent: 2006/0102980 (2006-05-01), Nakashiba

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