Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal
Reexamination Certificate
1997-12-31
2001-08-21
Le, Vu (Department: 2613)
Pulse or digital communications
Bandwidth reduction or expansion
Television or motion video signal
C348S425300
Reexamination Certificate
active
06278738
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a radio communication system which uses a radio channel or a data channel that has a lower error resilience. More particularly, the invention relates to a method and device which transmits video data in a radio communication system and which is capable of overcoming the disadvantages of transmitting data in a variable bit rate stream.
BACKGROUND OF THE INVENTION
Many radio communication systems transmit data via a radio (or wireless) channel in a fixed bit rate stream. The transfer rate of such bit stream is typically
64
Kbps, and the bit error rate of the fixed bit rate stream is lower than the bit error rate of a variable bit rate stream.
Accordingly, many variable bit rates streams are converted into fixed bit rate streams in order to reduce their bit error rates.
FIGS. 1A
to
1
D illustrate a conventional method for converting bit streams having different bit rate lengths into fixed bit rate streams having a certain bit rate length S. Such method was proposed by the NTT Mobile Communication Network of Japan in June 1995.
FIG. 1A
illustrates N bit rate streams (or blocks) b
1
to bn which respectively have different lengths as shown in FIG.
1
A. Also all the blocks b
1
to bn originate from the same starting point. Such fact is conceptually shown in
FIG. 1A
by the alignment of the leftmost edges of the blocks b
1
to bn. However, since the blocks b
1
to bn have different bit rate stream lengths, the ending points of the blocks b
1
to bn are different from each other. Such fact is conceptually shown in
FIG. 1A
by the fact that the rightmost edges of the blocks b
1
to bn are not aligned with each other. Specifically, in
FIG. 1A
, the bit rates of the blocks b
2
, b
3
, and bn are smaller than the specified bit rate length S, blocks b
1
and bn−1 are larger than the length S, and block bn−2 is equal to the specified length S.
To transmit all of the blocks b
1
to bn at a fixed bit rate, a portion
10
of the first block b
1
is appended to the end of the block b
2
, and a portion
20
of the block bn−1 is appended to the end of the block bn. (FIG.
1
B). Then, a portion
30
of the block b
1
is appended to the end of the block b
3
. (FIG.
1
C). Finally, a portion
40
of the block bn is appended to the end of the portion
30
of the block b
1
which was previously appended to the end of the block b
3
. (FIG.
1
D). Thus, none of the blocks b
1
to bn extend beyond the certain bit rate length S and can be simultaneously transmitted at the same fixed bit rate S. However, all of the blocks b
1
to bn still have the same starting points as shown in FIG.
1
D.
Even though the conventional method described above converts the bit rates of the blocks b
1
to bn into fixed bit rates and reduces the bit error rate, it takes a considerable amount of time to perform the variable length coding (VLC) process required to modify all of the blocks b
1
to bn to have the same bit rate length S. Furthermore, a very long block (e.g. the block b
1
) needs to be divided a plurality of times and stored in the shorter blocks b
2
and b
3
. In such instances, the processing time of the conventional method is further increased.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a video data transmission method and device having reduced calculation time and complexity for a bit stream.
Another object of the present invention is to provide a video data transmission method and device with increased error resilience.
In order to achieve the above and other objects, a device for transmitting video data is provided. The device comprises: a temporary memory which stores N original blocks of data which are variable length coded such that a plurality of said blocks have different bit rate lengths; a standby memory which sequentially stores N processed blocks such that said N processed blocks each have a bit rate length that is equal to or less than a specified bit rate length and which subsequently outputs said N processed blocks to be transmitted at a fixed bit rate; a bit counter which is operably coupled to said temporary memory and said standby memory, which generates address signals for storing said N original blocks in said temporary memory, and which generates an address signal for storing said N processed blocks in said standby memory; and a controller which is coupled to said bit counter, said temporary memory, and said standby memory, which determines a data state of said N original blocks input to said temporary memory and which uses said data state to control said bit counter to read original data of said N original blocks from said temporary memory at a reading bit rate which is shorter than or equal to said specified bit rate and to write said original data in said standby memory as said N processed blocks. Also, a method employed by the device is provided.
In order to further achieve the above and other objects, another device for transmitting video data is provided. The device comprises: a temporary memory which stores N original blocks of data which are variable length coded such that a plurality of said blocks have different bit rate lengths; a standby memory which sequentially stores N processed blocks such that said N processed blocks respectively have bit rate length that are equal to a specified bit rate length and which subsequently outputs said N processed blocks to be transmitted at a fixed bit rate; a bit counter which is operably coupled to said temporary memory and said standby memory, which generates address signals for storing said N original blocks in said temporary memory, and which generates an address signal for storing said N processed blocks in said standby memory; a codec which sequentially inputs said N original blocks from said temporary memory, which converts said N original blocks into said N processed blocks, and which outputs said N processed blocks to said standby memory; and a controller which is coupled to said bit counter, said temporary memory, said standby memory, and said codec, which determines a data state of said N original blocks input to said temporary memory and which uses said data state to control a manner in which said codec converts said N original blocks into said N processed blocks. Also, a method employed by the device is provided.
REFERENCES:
patent: 5440691 (1995-08-01), Carafillo et al.
patent: 5631644 (1997-05-01), Katata et al.
patent: 5903775 (1999-05-01), Murray
patent: 6084910 (2000-07-01), Stanger et al.
patent: 6151075 (2000-11-01), Shin et al.
Le Vu
Samsung Electronics Co,. Ltd.
Sughrue Mion Zinn Macpeak & Seas, PLLC
Vo Tung
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