Method and device for the formation of clock pulses in a bus...

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis

Reexamination Certificate

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Details

C377S048000

Reexamination Certificate

active

10471908

ABSTRACT:
A method for forming clock pulses of a second clock cycle (AT, TT) from clock pulses of a specified first clock cycle (ET) in a bus system having at least one user, a first number (E) of the clock pulses of the first clock cycle being determined or specified in a specifiable time interval and a second number (A) of the clock pulses of the second clock cycle being determined or specified in the specifiable time interval, in which an intermediate value (R) of the number of clock pulses is specified in the specifiable time interval, and the intermediate value (R) is compared to a value (C) which is formed from the first number (E) of clock pulses and the second number (A) of clock pulses and from the comparison a truth value (TRUE, FALSE) is yielded, and a clock pulse of the second clock cycle (AT, TT) is generated as a function of the truth value (TRUE, FALSE).

REFERENCES:
patent: 5202642 (1993-04-01), Dixon
patent: 5436628 (1995-07-01), Liepold
patent: 5907590 (1999-05-01), Mogi
patent: 6249235 (2001-06-01), Iwasaki
patent: 6557133 (2003-04-01), Gomes
patent: 100 00 302 (2001-07-01), None
patent: 100 00 303 (2001-07-01), None
patent: 100 00 304 (2001-07-01), None
patent: 100 00 305 (2001-07-01), None

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