Semiconductor device manufacturing: process – With measuring or testing
Reexamination Certificate
1999-05-27
2001-03-06
Picardat, Kevin M. (Department: 2822)
Semiconductor device manufacturing: process
With measuring or testing
C438S017000, C438S018000
Reexamination Certificate
active
06197605
ABSTRACT:
COPYRIGHT NOTICE
A portion of the disclosure of this patent document contains material which is subject to copyright protection. The copyright owner has no objection to the xeroxographic reproduction by anyone of the patent document or the patent disclosure in exactly the form it appears in the Patent and Trademark Office patent file or records, but otherwise reserves all copyright rights whatsoever.
MICROFICHE APPENDIX
A microfiche appendix including 60 frames on one fiche is included herewith.
BACKGROUND OF THE INVENTION
The present invention relates to the field of integrated circuits, their manufacture, design, and operation. More specifically, in one embodiment the invention provides an improved method and device for testing integrated circuits in which the test system is qualified without the presence of an integrated circuit device.
Integrated circuit test systems are well known to those of skill in the art and are widely utilized in the integrated circuit manufacturing process. In a typical manufacturing process integrated circuit devices are formed on a wafer. A first test step is used to test the devices after fabrication on the wafer. The wafer is then diced and the individual integrated circuits are placed in packages. A second test step is then performed to test the fully packaged devices.
In a typical test system carefully selected signals are applied to the wafer probe leads or to the package leads of the device under test (DUT), and the response of the integrated circuit to these signals is monitored. The signals applied to the leads are referred to as “vectors” or “test vectors.”
As integrated circuits are improved it is necessary to formulate new test vectors to apply to the improved integrated circuits. For example, as a microprocessor moves from one generation to another, it typically will increase in complexity. Accordingly, it is necessary to develop new test vectors and software for monitoring the response to the test vectors for each generation of microprocessors.
The conventional processes, however, are not desirable. As recognized herein, conventional processes result in long lead times for integrated circuit design and manufacturing. Specifically, the invention herein recognizes that it is extremely inefficient to wait for the first device to be manufactured before the test vectors for a test system may be utilized or tested. Since the test vectors often do not correctly or fully test the device, it is necessary after the first devices are fabricated to modify the test vectors. This leads to longer cycle times for developing and manufacturing integrated circuits.
From the above it is seen that an improved method of manufacturing integrated circuits is needed.
SUMMARY OF THE INVENTION
An improved method and set of devices for manufacturing integrated circuits is disclosed by virtue of the present invention. A software model of a device under test is placed on an appropriately programmed digital computer. A semiconductor test system (for example a wafer prober) is programmed to perform an appropriate test operation on the device under test. A software model of the device under test is used to test the test system software components and test vectors. Since these operations may be completed even before the first device is actually fabricated, the cycle time for new integrated circuit products may be reduced, and the efficiency of test operations may be improved.
Accordingly, in one embodiment the invention provides a method of making integrated circuits comprising the steps of designing an integrated circuit; developing a test process for the integrated circuit; simulating a response of the integrated circuit to the test process; modifying the test process in response to the step of simulating a response of the integrated circuit; fabricating an actual integrated circuit; and using the modified test process to test the actual integrated circuit.
A further understanding of the nature and advantages of the inventions herein may be realized by reference to the remaining portions of the specification and the attached drawings.
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Crome Caleb
Mehta Naresh U.
Simunic Tajana
Altera Corporation
Picardat Kevin M.
Townsend and Townsend / and Crew LLP
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