Boots – shoes – and leggings
Patent
1996-10-09
1999-07-13
Teska, Kevin J.
Boots, shoes, and leggings
39518306, 39518309, G06F 1750
Patent
active
059235675
ABSTRACT:
A method and device for testing and manufacturing integrated circuits such as microprocessors, memories, ASICs, programmable logic, and other types of integrated circuits. A test system is designed to test the relevant integrated circuit. A device under test emulator responds to the test system. If modifications are needed, the test system can be modified, and used to test actual devices.
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Crome Caleb
Mehta Naresh U.
Simunic Tajana
Altera Corporation
Kik Phallaka
Teska Kevin J.
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