Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
2002-08-26
2008-09-23
Bocure, Tesfladet (Department: 2611)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C375S376000
Reexamination Certificate
active
07428287
ABSTRACT:
For synchronising the data transmission between a CMOS circuit (1) and a bipolar circuit (2) a DLL (delayed lock loop) is provided which sets a phase deviation between the operating clocks (CLK1,CLK2) of the two circuits (1, 2), and changes the phase of at least one of the two clocks (CLK1,CLK2) according to this phase deviation, until the two clocks are in phase, in such a way that the data (DATA1) provided by the first circuit (1) can then be taken on by the second circuit (2). To this end, the DLL circuit comprises a phase detector (6), a loop filter (7) and an adjustable element (8).
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Bocure Tesfladet
Dicke Billig & Czaja, PLLC
Infineon - Technologies AG
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