Method and device for sequential readout of a memory with...

Details Method and device for sequential readout of a memory with... Method and device for sequential readout of a memory with...

2005-08-09

2005-08-09

Bragdon, Reginald G. (Department: 2188)

Electrical computers and digital processing systems: memory

Address formation

Generating prefetch, look-ahead, jump, or predictive address

C712S208000, C712S233000

Reexamination Certificate

active

06928530

ABSTRACT:
A memory implementing an incremental address counter is sequentially read. An address jump includes detecting an address jump signal, incrementing the incremental address counter, and reading the content of the memory at the incremented address. The content read at the incremented address is transferred into the incremental address counter, and the content of the memory is read at the address contained in the incremental address counter.

REFERENCES:
patent: 5651123 (1997-07-01), Nakagawa et al.
patent: 5831997 (1998-11-01), Kodashiro
Greenfield, Josheph D. and William C. Wary, “Using Microprocessors and Microcomputers: The 6800 Family”; John Wiley & Sons 1981; pp. 48-52, 115-116, 175-181, and 193-194.

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