Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
Reexamination Certificate
2004-12-21
2008-03-11
Patel, Nitin C. (Department: 2116)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
C713S400000, C713S500000, C713S502000, C713S503000, C327S001000, C327S048000, C331S011000
Reexamination Certificate
active
07343510
ABSTRACT:
A clock detection and selection circuit (100) can include a first counter (102-0) that generates a first count value CNT1according to a first clock signal CLK1and a second counter (102-1) that generates a second count value CNT2according to a second clock signal CLK2. First separation-detect logic (102-0) and second separation-detect logic (102-1) determine if a pre-specified difference exists between a first count value (CNT1/CNT1′) and second count value (CNT2/CNT2′). According to such determinations, separation information (INF—1and INF—2) can be generated indicating which clock signal (CLK1or CLK2) is faster. Selection logic (106) can select a faster of the clock signals (CLK1or CLK2) if the separation information values confirm one another.
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Bridgewater Walter
Nayak Anup
Pantelakis Dimitris
Raza S. Babar
Ross Mark
Cypress Semiconductor Corporation
Haverstock & Owens LLP
Patel Nitin C.
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