Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2007-12-03
2011-11-15
Mai, Son (Department: 2827)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C714S763000
Reexamination Certificate
active
08060688
ABSTRACT:
A data processing system comprises a Flash memory (120) having a storage space partitioned in a plurality of storage pages (P′). Each storage page comprises a memory reliability indicator indicative for the reliability of a storage region of the memory. Coupled to the Flash memory is a controller (150) for the Flash memory, that includes a facility for protecting data against errors occurring during storage in the Flash memory and for detecting and/or correcting errors in the data stored in the data, when retrieved from the Flash memory. A data processing unit (100) is coupled to the controller (150) that has access to a working page (P) comprising a first section of user data and a second section of management information, including a memory reliability indicator. The data processing system is characterized by a data re-arranging facility (105) for subdividing the data in the work page into a plurality of portions. Each portion comprises a part of the user data, and the last portion additionally comprises the management information including the memory reliability indicator. The controller (150) is arranged to subsequently generate redundant data for each of those portions and to write the content of the subsequent portions with its respective redundant data to the storage page (122).
REFERENCES:
patent: 5603001 (1997-02-01), Sukegawa et al.
patent: 5606532 (1997-02-01), Lambrache et al.
patent: 6041001 (2000-03-01), Estakhri
patent: 6684289 (2004-01-01), Gonzalez et al.
patent: 7475184 (2009-01-01), Lee
patent: 7849381 (2010-12-01), Tomlin
patent: 7877665 (2011-01-01), Mokhlesi
patent: 2004/0083334 (2004-04-01), Chang et al.
patent: 2006/0114726 (2006-06-01), Kozakai et al.
patent: 2007/0089023 (2007-04-01), Sanders
patent: 2008/0002469 (2008-01-01), Ishimoto
patent: 2010/0281341 (2010-11-01), Wu et al.
patent: 1577774 (2005-09-01), None
Sandisk; “Sandisk Shark AMBA Bus NAND Interface Technical Reference—Draft 1.06”; Sunnyvale, CA; 2002; 85 Pages.
James Michael
Manning Robert
Mergler Iwo
Mai Son
NXP B.V.
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