Error detection/correction and fault detection/recovery – Pulse or data error handling – Data formatting to improve error detection correction...
Reexamination Certificate
2007-03-13
2007-03-13
Britt, Cynthia (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Data formatting to improve error detection correction...
C711S157000
Reexamination Certificate
active
10885992
ABSTRACT:
The writing address supply part210supplies writing addresses for writing the bits forming bit sequences corresponding to the header H contained in a frame to be transmitted or stored and bit sequences corresponding to the data D, into the operating memory220. The reading address supply part230alternately supplies to the operating memory220a plurality of addresses for reading a plurality of continuous bits corresponding to the header H from the operating memory220, and an address for reading 1 bit corresponding to the data D from the operating memory220, and reads the bit sequence such that the bits forming the bit sequence corresponding to the header H are scattered and arranged within the bit sequence forming the data D, from the operating memory. In accordance with such an interleaving device, it is possible to individually randomize frames according to their constituent data, and it is possible to transmit the bits that make up such data in a format which is most suited for said data.
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Hotani Sanae
Kawahara Toshiro
Miki Toshio
Suzuki Takashi
Brinks Hofer Gilson & Lione
Britt Cynthia
NTT Mobile Communications Network Inc.
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