Method and device for interconnecting integrated circuits in thr

Details Method and device for interconnecting integrated circuits in thr Method and device for interconnecting integrated circuits in thr

1996-11-15

1998-12-08

Ostrowski, David

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

257724, 257725, 257748, 257774, H01L 2302, H01L 2334

Patent

active

058474480

ABSTRACT:
A method and device for interconnecting stacked semiconducting plates, in which each of the plates has an integrated circuit. The semiconducting plates (P) are stacked and made solid with each other. In one embodiment, their connecting contacts are connected by a wire (F) to any one of the faces of the stack except one (B), which is to be in contact with a printed circuit. Connections of the plates together and with the printed circuit is made on the faces (F.sub.V, F.sub.S, F.sub.L) of the stack.

REFERENCES:
patent: 3746934 (1973-07-01), Stein
patent: 4706166 (1987-11-01), Go
patent: 4754316 (1988-06-01), Reid
patent: 4939568 (1990-07-01), Kato et al.
patent: 4953005 (1990-08-01), Carlson et al.
patent: 4956694 (1990-09-01), Eide
patent: 4956695 (1990-09-01), Robinson et al.
patent: 5016138 (1991-05-01), Woodman
patent: 5019946 (1991-05-01), Eichelberger et al.
patent: 5043794 (1991-08-01), Tai et al.
patent: 5051865 (1991-09-01), Kato
patent: 5281852 (1994-01-01), Normington
patent: 5313096 (1994-05-01), Eide
patent: 5561682 (1996-10-01), Bertin et al.
patent: 5604377 (1997-02-01), Palagonia
patent: 5648684 (1997-07-01), Bertin et al.
Val `3-D Interconnection for Ultra-Dense Multichip Modules` pp. 814-821, 1990.
Val `3-D Interconnection for Ultra-Dense Multichip Modules` 40th EEE Conf. pp. 539-547, 1990.
`Semiconductor Europa--the shape of things to come` Electronic Engineering pp. 49-55, May 1990.

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