Static information storage and retrieval – Read/write circuit – Data transfer circuit
Reexamination Certificate
2005-09-23
2008-09-30
Dinh, Son (Department: 2824)
Static information storage and retrieval
Read/write circuit
Data transfer circuit
C365S194000, C365S211000, C327S176000
Reexamination Certificate
active
07430140
ABSTRACT:
A memory architecture and a method of operating the same can provide a substantially constant data valid window (DVW) irrespective of a temperature for the memory device. Generally, a memory device can receive an access request, determine a temperature of the memory device, and switch a number of delay elements in an output buffer in response to the temperature of the memory device. In one embodiment, a memory device can have a multi-stage input-output (I/O) buffer and an automatic temperature compensated circuit that samples a temperature of the memory and then switches a number of delay elements in the I/O buffer into a data path between the memory and the output to provide a substantially constant DVW over changes in temperature.
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Chia Chor Fung
Manapat Rajesh
Mastipuram Ritesh
Cypress Semiconductor Corporation
Dinh Son
Haverstock & Owens LLP
Le Toan
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