Electrical computers and digital data processing systems: input/ – Interrupt processing
Reexamination Certificate
2006-06-06
2006-06-06
Perveen, Rehana (Department: 2112)
Electrical computers and digital data processing systems: input/
Interrupt processing
C718S105000
Reexamination Certificate
active
07058743
ABSTRACT:
A method and device for dynamically targeting interrupts in a computer system. When an operation is initiated, an identifier for the initiator of the operation is stored along with an operation identifier. When an operation completes or needs processor attention due to an error condition or otherwise, the processor or node to interrupt is determined based on the stored indication of the initiator of the operation. An interrupt target data structure may be provided that contains associations between sources that initiate operations and those targets that can service interrupts. If a target scheduled to field an interrupt becomes unavailable, the interrupt can be retargeted to another processor or node by reloading an entry in the interrupt target data structure.
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Jackson Christopher J.
Ostrovsky Boris
Meyertons Hood Kivlin Kowert & Goetzel P.C.
Misiura Brian
Perveen Rehana
Rankin Rory D.
Sun Microsystems Inc.
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