Method and device for determining the time response of a...

Details Method and device for determining the time response of a... Method and device for determining the time response of a...

2005-09-29

2008-10-14

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C703S019000

Reexamination Certificate

active

07437696

ABSTRACT:
A method and a device determine a time response of a digital circuit. The time response is determined as a time difference between a data delay of a data path of the digital circuit, and a clock delay of a clock signal, which causes storage of a data item on the data path, taking into account a check. The check is determined dependent on a data slew of a signal on the data path and a clock slew of the clock signal in such a way that a positive time difference ensures the correct saving of the data item.

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